Cyclical dc voltage converter for suppressing voltage spikes and oscillations

ABSTRACT

A DC voltage converter is provided that cyclically converts an input-side supply voltage into an output voltage. The converter includes an inductive storage element connected between a terminal for the supply voltage and, in a manner such that it is coupled via a first switch, a reference potential terminal. The capacitively buffered output voltage terminal is connected, via a second switch, between the inductive storage element and the first switch. Provision is furthermore made of a third switch, which is intended to selectively short the inductive storage element that is connected in parallel and is controlled by a control circuit. The control circuit is controlled, on the input side, by a control voltage that is tapped off at the second terminal of the inductive storage element.

RELATED APPLICATIONS

This Application is a Continuation Application of copending application Ser. No. 11/168,153, which was filed on Jun. 28, 2005. The copending Application claims priority to German Application No. 10 2004 031 395.4, filed on Jun. 29, 2004. The contents of each of the prior filed Applications are hereby incorporated herein by reference.

BACKGROUND

DC voltage converters are used in portable devices in which the batteries provide only a low supply voltage on account of the desired miniaturization and weight saving. In order to supply the circuit units of the devices, a DC voltage converter converts the supply voltage into a higher output voltage. The design of such a DC voltage converter (which is also referred to as a step-up converter) is described in Tietze/Schenk: “Halbleiterschaltungstechnik” [Semiconductor circuit technology], 12th edition, pages 948 to 949.

A DC voltage converter has an inductive storage element, which is connected between a terminal for the supply voltage and, in such a manner that it is coupled via a first switch, a terminal for the reference potential. A capacitively buffered terminal for the output voltage is connected, via a second switch, between the inductive storage element and the first switch.

During ideal cyclic operation, the first switch and the second switch change over simultaneously, with the result that either the first switch is on and the second switch is off or the first switch is off and the second switch is on, respectively. If the first switch is on, energy is stored in the inductive storage element. The charge is removed if the second switch is on, and the capacitor is charged. If the switching states of the first and second switches remain unchanged, the coil current falls continuously until the inductive storage element has been discharged.

If the first and second switches are on, the energy stored in the capacitor drains via the second and first switches. This impairs the efficiency of the DC voltage converter.

If the first and second switches are off at the same time and energy is still stored in the inductive storage element, the coil current is interrupted and voltage spikes which may damage the circuit occur. In addition, interfering oscillations occur, said oscillations being caused by the resultant resonant circuit that is formed from the inductive storage element and the parasitic switch capacitance.

In practice, the first and second switches cannot be changed over at exactly the same time on account of propagation times and other effects. Therefore, it is difficult to avoid the first and second switches being off at the same time. The first and second switches may likewise be on at the same time. This state is usually avoided on account of the efficiency being greatly reduced. In addition, it is also sometimes desired, when regulating the circuit, that the first and second switches are off at the same time so that the output voltage assumes a prescribed value. In order to suppress the associated voltage spikes or voltage oscillations, the inductive storage element is shorted, with the result that the coil current flows in the short-circuit circuit. Such a circuit is also referred to as a snubber circuit. A snubber circuit has hitherto usually been formed by a series circuit comprising a diode and a series resistor, said series circuit being connected in parallel with the inductive storage element. The series resistor is used to set a voltage value, at which the inductive storage element is shorted. The voltage value may not be less than the threshold voltage of the diode, which, in integrated circuits, is possibly already a critical value.

The problem is that both the diode and the resistor must be dimensioned as accurately as possible (which is associated with outlay in terms of technology and costs) so that, on the one hand, the inductive storage element is shorted at a desired threshold value and, on the other hand, the losses on account of the voltage drop across the resistor are not too large.

SUMMARY

The following presents a simplified summary in order to provide a basic understanding of one or more aspects of the invention. This summary is not an extensive overview of the invention, and is neither intended to identify key or critical elements of the invention, nor to delineate the scope thereof. Rather, the primary purpose of the summary is to present one or more concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.

The invention is directed to a DC voltage converter whose inductive storage element is shorted by an individual switch having a suitable control circuit if voltage spikes or voltage oscillations occur, wherein the switch is implemented in a simple manner and generates few losses.

According to one embodiment of the invention, a DC voltage converter is disclosed that cyclically converts an input-side supply voltage into an output voltage. The converter comprises an inductive storage element having a first terminal and a second terminal, the first terminal of which is connected to a supply voltage terminal.

The converter also includes a first switch which has a first terminal and a second terminal and is connected in series with the inductive storage element, wherein the first terminal of the first switch is connected to the second terminal of the inductive storage element and the second terminal of the first switch is connected to a reference potential terminal.

The converter further comprises a second switch having a first terminal and a second terminal, wherein the first terminal thereof is connected to the second terminal of the inductive storage element and the second terminal is connected to an output voltage terminal.

In addition, a capacitive storage element is provided, which is connected between the output voltage terminal and the reference potential terminal. Lastly, a third switch is provided, which is configured to short the inductive storage element, is connected in parallel with the inductive storage element and is connected to a control circuit, which can be controlled, on the input side, by a control voltage that is tapped off at the second terminal of the inductive storage element.

In the DC voltage converter according to one embodiment of the invention, the inductive storage element is shorted by the activatable third switch if the control circuit detects voltage spikes or voltage oscillations. This feature has the advantage that the third switch has only low power losses and both the third switch and the components of the control circuit can be formed in an inexpensive and simple manner using integrated circuit technology.

One additional embodiment of the control circuit comprises a threshold value decision unit, to which the control voltage is applied on the input side, and a downstream storage element whose output-side storage signal is coupled to a control terminal of the third switch. This embodiment has the advantage that it comprises only two essential standard components which can be formed in an inexpensive and simple manner using integrated circuit technology.

Another embodiment of the invention comprises the provision of a regulating circuit, to which the output voltage is applied on the input side and which provides a first switching signal and a second switching signal on the output side so that the output voltage assumes a prescribed value. This means that the prescribed output voltage is provided even when the load is changed.

In one example the first and second switching signals are provided so that the first switch and the second switch are on in the push-pull mode or are off in the push-pull mode. This corresponds to ideal high-efficiency operation of the DC voltage converter.

In another example the first switch is in the form of an n-channel field effect transistor and the second switch is in the form of a p-channel field effect transistor or the first switch is in the form of a p-channel field effect transistor and the second switch is in the form of an n-channel field effect transistor, and the first switching signal and the second switching signal are in phase or are virtually in phase, with the result that both switches can also be driven using the same signal.

In a DC voltage converter whose first switch and whose second switch are in the form of n-channel field effect transistors or whose first switch and whose second switch are in the form of p-channel field effect transistors, the first switching signal and the second switching signal are in antiphase or are virtually in antiphase. This has the advantage that only one type of switch is used.

In an alternative embodiment, the second switch of the DC voltage converter is in the form of a diode. In this case, the regulating circuit provides only the first control signal.

In the control circuit, a threshold value decision unit assigns one of two logic states to an output-side signal. A first logic state is assumed if an internal threshold value that is greater than a prescribed output voltage is exceeded, and a second logic state is otherwise assumed. This is expedient in order to detect voltage spikes which occur.

In an alternative embodiment of the threshold value decision unit, the threshold value may be selected in such a manner that undershoots originating from the resonant circuit which may occur are detected.

In one embodiment, the threshold value decision unit has two internal threshold values, a first threshold value for changing over from the first to the second state, by switching hysteresis, and a second threshold value for changing over from the second to the first state. This aspect may also be referred to as a Schmitt trigger and can be implemented in a particularly simple manner.

The storage element used in the control circuit in one example has a set input, which is coupled to the output of the threshold value decision unit, a reset input and an output, the reset input being coupled to the first switching signal in such a manner that one of the logic states is applied to the storage element on the output side if the first switch is on and another logic state is applied on the output side as soon as a clock edge appears at the set input if the first switch is off. The occurrence of a first overshoot or undershoot is indicated by changing the initial state. This initial state remains unchanged if the first switch is off. The output signal is advantageously coupled to the third switch that shorts, with the result that the inductive storage element is shorted when voltage oscillations occur.

In one embodiment, the output of the storage element is coupled to the third switch via an inverter. The inverter comprises a driver inverter that switches quickly as regards the gate capacitance (the charge of which is to be reversed) of the third switch.

In accordance with another embodiment, the storage element comprises a D-type flip-flop whose integration is sufficiently well known.

In one embodiment of the control circuit, provision is made of a first inverter, which is connected upstream of the reset input of the storage element, with the result that the storage element is reset if the first switch is on.

The threshold value decision unit may be provided with a supply input. The storage element may be formed such that it has a further input, which, for example in the case of the D-type flip-flop, is used to assign a value to one of the logic states.

The third switch may comprise an n-channel field effect transistor or p-channel field effect transistor. This results in degrees of freedom when designing the circuit.

In another example the DC voltage converter is designed using integrated circuit technology. The further miniaturization of devices is thus supported.

To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative aspects and implementations of the invention. These are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The detailed description is described with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number may identify the figure in which the reference number first appears. The use of the same reference number in different instances in the description and the figures may indicate similar or identical items.

FIG. 1 is a block level diagram illustrating one exemplary embodiment of the invention.

FIG. 2 is a combined timing and state diagram illustrating the time profile of selected signals.

DETAILED DESCRIPTION

FIG. 1 shows one exemplary embodiment of the invention, which is operable to convert a supply voltage Vin (which is applied initially) into an output DC voltage Vout. An inductive storage element 1 having a first terminal 11 and a second terminal 12 is coupled, by way of the first terminal 11, to a terminal for providing the supply voltage Vin and is connected, by way of the second terminal 12, to a reference potential Vss via a switch 2. A second switch 3 having a first terminal 31 and a second terminal 32 is connected, via the first terminal 31, to the second terminal 12 of the inductive storage element 1. The second terminal 32 of the second switch 3 is connected to a terminal for tapping off the output voltage Vout. A capacitor 4 is connected between the terminal for tapping off the output voltage Vout and the reference potential Vss. A third switch 5 for shorting the inductive storage element 1 is connected in parallel with the latter. The third switch 5 can be switched using a control circuit 6 whose input-side control voltage V1 is tapped off at the second terminal 12 of the inductive storage element 1.

The control circuit 6 comprises a threshold value decision unit 7, which has a storage element 8 connected downstream of it, the output of said storage element being coupled to the control input of the third switch 5. As shown in FIG. 1, a second inverter 11 is provided for coupling purposes. The inverter may also be in the form of a fast-switching driver inverter. As an alternative, it is also possible, for example, to couple directly or via an amplifier. The threshold value decision unit 7 is formed in such a manner that a first state is applied to the output of the threshold value decision unit 7 if the input signal exceeds an internal threshold and in such a manner that a second state of the threshold value decision unit output is otherwise applied.

An alternative embodiment of the threshold value decision unit 7, which may be, for example, a Schmitt trigger, has two internal threshold values, a first threshold value for changing over from the first to the second state being distinguished, by switching hysteresis, from a second threshold value for changing over from the second to the first state.

The storage element 8 has a set input, a reset input, and an output, and is driven, using the first switching signal S2, in such a manner that one logic state is applied to the output side if the first switch 2 is on and in such a manner that another logic state is applied to the output side if a clock edge appears at the set input and the first switch 2 is off. In FIG. 1, a first inverter 10 is provided for the purpose of coupling the reset input to the first switching signal S2.

One advantageous exemplary implementation of the storage element 8 is a D-type flip-flop whose initial state is reset if no voltage is applied to the reset input, as illustrated by way of example in FIG. 1. This embodiment allows the circuit to be started up in a stable manner.

The threshold value decision unit may be provided with a supply input. The storage element may be formed such that it has a further input, which, for example in the case of the D-type flip-flop, is used to assign a value to one of the logic states. This input, in one example, is connected to the output voltage Vout. As shown in figure 1, the threshold value decision unit 7 is formed, by way of example, without a supply input and the storage element 8 is formed such that it has a further input.

In addition, provision is made of a regulating circuit 9 whose function is to ensure that the output voltage Vout assumes a prescribed value. The output voltage Vout is applied to the regulating circuit 9 on the input side and a first switching signal S2 for controlling the first switch 2 and a second switching signal S3 for controlling the second switch 3 are provided on the output side.

The first switching signal S2 and the second switching signal S3 are ideally selected in such a manner that the first switch 2 is on and the second switch 3 is off or the first switch 2 is off and the second switch 3 is on. Suitable embodiments of the switches are n-channel field effect transistors or p-channel field effect transistors. In FIG. 1, the first switch 2 is, for example, in the form of an n-channel field effect transistor and the second switch 3 is, for example, in the form of a p-channel field effect transistor. In this case, the first switching signal S2 and the second switching signal S3 are in phase or are virtually in phase. This means, for example, that the first switching signal S2 and the second switching signal S3 simultaneously have a high signal level and simultaneously have a low signal level. It is likewise conceivable for the first switch 2 to be in the form of a p-channel field effect transistor or for the second switch 3 to be in the form of an n-channel field effect transistor.

In order to describe the method of operation of the control circuit 6, the first switching signal S2 and the second switching signal S3 are, for example, selected in such a manner that three phases occur during circuit operation:

-   -   in phase I, the first switch 2 is on and the second switch 3 is         off,     -   in phase II, the first switch 2 is off and the second switch 3         is on, and     -   in phase III, both the first switch 2 and the second switch 3         are off.

In addition, another phase IV is possible, in which both the first switch 2 and the second switch 3 are on. Phase I, in which the inductive storage element 1 is charged, and phase II, in which the capacitor 4 is charged, are essential to operation of the DC voltage converter. Voltage spikes and voltage oscillations which are attenuated by using the control circuit 6 may occur during phase III. During phase IV, the capacitor is discharged via the second switch 3 and the first switch 2, thus impairing the efficiency but not resulting in voltage spikes or voltage oscillations which could be attenuated by the control circuit 6. This situation is therefore not considered in any more detail.

FIG. 2 uses a state diagram to illustrate the temporal change in selected time signals. The first switching signal S2, the second switching signal S3, the control voltage V1, the output signal S7 of the threshold value element 7 and the third switching signal S5 that is linked to the output of the storage element 8 are illustrated.

The first switching signal S2 cyclically changes its state. It is coupled to the first switch 2 in such a manner that, in the case of a low level, the first switch 2 is off and, in the case of a high level, the first switch 2 is on. The same assignment of the levels determines the switching state of the third switch 5. The second switching signal S3 is coupled to the second switch 3 in such a manner that, in the case of a low level, the second switch 3 is on and, in the case of a high level, the second switch 3 is off.

In phase I, the inductive storage element 1 is charged by a current via the terminal for the supply voltage Vin. The control voltage V1 that is applied to the input of the control circuit 6 is at reference potential Vss. The output signal S7 of the threshold value decision unit 7 is set to a first logic state of the threshold value decision unit output. The reset input of the storage element 8 is coupled to the first switching signal S2 in such a manner that a first logic state of the storage element output is applied. It should be noted that the first logic state of the threshold value decision unit output does not have to have the same value as the first logic state of the storage element output.

The output of the storage element 8 is coupled to the third switch 5 in such a manner that the latter is off during the first logic state of the storage element output.

In phase II, a discharging current of the inductive storage element 1 flows via the second switch 3 and the capacitor 4 is charged. The control voltage V1 is at approximately the same potential as the output voltage Vout.

The internal threshold value of the threshold value decision unit 7 is set in such a manner that either overshoots or undershoots of the control voltage V1 are detected. If the threshold value is set to detect overshoots, the first state of the threshold value decision unit output is applied. If the threshold value is set to detect undershoots, a second logic state of the threshold value decision unit output is applied. In this exemplary embodiment, the threshold value decision unit is designed in such a manner that its output is inverting and its internal threshold is set to detect undershoots. In this case, in phase II, the output signal S7 is in the second state of the threshold value decision unit output.

The output of the storage element 8, like the third switching signal S5, remains unchanged since the first switch 2 is off and no clock edge appears on the input side. The third switch 5 remains off.

If, in phase III, energy is still stored in the inductive storage element 1, the flow of current is interrupted if the first switch 2 and the second switch 3 are simultaneously off. The control voltage V1 would have voltage spikes and voltage oscillations if it were not attenuated by shorting (in accordance with the invention) the coil current when a first overshoot or undershoot occurred.

When an overshoot of the control voltage V1 occurs, the second state of the threshold value decision unit 7 is applied to the output of the latter if the internal threshold value has been set to detect overshoots. When an undershoot of the control voltage V1 occurs, the first state of the threshold value decision unit 7 is applied to the output of the latter if the internal threshold value has been set to detect undershoots.

In FIG. 2, the control voltage V1 first of all rises and then falls in phase III. When the internal threshold for detecting undershoots is undershot, the output signal S7 of the threshold value decision unit 7 changes to the first state.

When a detected overshoot or a detected undershoot occurs, the output-side state of the storage element 8 changes since the first switch 2 is off and a signal edge occurs on the input side. The output-side state of the storage element 8 remains in this state since further clock edges do not change the state if the first switch 2 is off. Consequently, the third switching signal S5 has a high level and the third switch 5 is on. As a result, the inductive storage element 1 is shorted, with the result that further oscillations of the control voltage V1 are suppressed and the control voltage V1 is forced to the potential of the supply voltage Vin.

While the invention has been illustrated and described with respect to one or more implementations, alterations and/or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular regard to the various functions performed by the above described components or structures (assemblies, devices, circuits, systems, etc.), the terms (including a reference to a “means”) used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the invention. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the terms “including”, “includes”, “having”, “has”, “with”, or variants thereof are used in either the detailed description and the claims, such terms are intended to be inclusive in a manner similar to the term “comprising”. 

1. A DC voltage converter, comprising: an inductance coupled between a supply potential and a feedback node; a capacitance coupled between an output terminal and a reference potential; a first switch coupled between the feedback node and the reference potential; a second switch coupled between the feedback node and the output terminal; a third switch coupled in parallel with the inductance; and a control circuit configured to generate a control signal operable to selectively activate the third switch based on a voltage condition at the feedback node.
 2. The DC converter of claim 1, further comprising a regulating circuit configured to generate switching signals for the first and second switches, respectively, wherein the switching signals are configured to charge the inductance in a first phase, discharge the inductance and charge the capacitance in a second phase, and deactivate both the first and second switches in a third phase.
 3. The DC converter of claim 2, wherein the control circuit is configured to identify an undershoot condition or an overshoot condition at the feedback node during the third phase and close the third switch via the control signal in response thereto. 